ECOC TV Interview with Intel’s Thomas
Intel GM of Photonic Integration Thomas Liljeberg talks about the need for integration of silicon photonics and switch ASICS.
Bandwidth scalability challenges are looming in terms of density, cost, and power. These are all challenges that need tighter integration of optics and networking silicon. Here to tell us more about the motivation for all this is Thomas Liljeberg of Intel. Thomas, thanks for talking to us. What's behind this need for integration?
I think we're seeing fundamentally the scalability challenge to the data center networks. And it's in part due to the I/O technology not keeping up with the growth in traffic and the growth in switch bandwidth. And what that really causes, jumping to the conclusion, is that the pluggable optics model that has served us so well for years now is really breaking down, and that the power consumed by the systems, the size of the systems, and fundamentally, the ability to build these large systems is being challenged. And we believe, as I think, it's a broad consensus at this point is that the way to solve it is to pull the photonics much closer to the networking silicon and the switch ASIC and do that through co-packaging and derive some both cost and power and benefits through that.
Yeah. And silicon photonics will have an important role to play in this?
I think that's absolutely true. And the silicon photonics has a high degree of integration, so you can actually fit it and manufacture it within the envelope that's required for co-packaging. As the technology has matured, we've also gotten to a point, where we are leveraging-- the vision of silicon photonics was to bring to bear all the capability and scale of silicon manufacturing to photonics, and we're there or approaching that point.
So we really can leverage the capabilities of silicon manufacturing. We've done a lot of work of bringing those concepts and methods into photonics, and I think it's ready for something like this. And this is really the vision of why Intel got involved in photonics that integrate the silicon photonics with all types of silicon, where high bandwidth is required.
When do you think all this will really start to happen?
Well, it's interesting because the concept has been talked about for a long time. And then as I hinted at in my talk, it's been a little bit notional that everyone's talked about that, somewhere out in the future, this is needed. And I think a number of things has happened. And one is that they may not agree exactly when it is, but that day had moved close enough that it's being taken serious. And customers are stepping up and saying, hey, we have a problem here that we've got to solve. And it's a hard problem, so let's start soon enough.
Whether there's a hard feasibility wall, where everything falls apart if we don't have this that maybe are deeply argued, but the transition is going to happen gradually. It's a hard transition. It's not only technology. It's supply chain. It's petitioning who does what in the whole ecosystem. So what we laid out is that we think that, as an industry, we're going to dip our toes to a small scale at 25-terabit switches, which is a couple of years out. I'd love to be surprised. We're certainly going to be prepared if it becomes more than that.
At 50-T, this is also what's been expressed by the more vocal of the end customers that this is when it's really needed and when you need to deploy it at scale and across entire deployments.
And then I think at 100-T, as they also said, I think that's when the existing model fundamentally breaks down, and you're getting a lot of value before that, but at 100-T, 2025 timeframe, you'd really need it. So that's my view of the timelines here. [INAUDIBLE]
So the clock is ticking. Thank you for talking to us.
Oh, thank you.