Arria® V FPGA and SoC FPGA
The Arria® V FPGA family offers the highest bandwidth and delivers the lowest total power for midrange applications, such as remote radio units, 10G/40G line cards, and broadcast studio equipment. There are five targeted variants, including SoC variants with a dual-core ARM* Cortex*-A9 hard processor system (HPS) to best meet your performance, power, and integration needs.
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Arria® V FPGA and SoC FPGA
Arria® V GZ FPGA
Offers the lowest power-per-bandwidth for midrange applications, and are ideal for power-sensitive designs that require transceivers up to 12.5 Gbps.
Arria® V GT FPGA
Offers the lowest total power for mid-range applications and the lowest power transceivers for speeds up to 10.3125 Gbps.
Arria® V GX FPGA
Offers the lowest total power for mid-range applications and the lowest power transceivers for speeds up to 10.3125 Gbps.
Arria® V ST SoC FPGA
Intel® SoC FPGA with ARM*-based HPS and 10.3125 Gbps transceivers.
Arria® V SX SoC FPGA
Intel® SoC FPGA with ARM*-based HPS and 6.5536 Gbps backplane-capable transceivers.
Benefits
Industry's Lowest Power
Arria® V GZ FPGA offers the lowest power-per-bandwidth for mid-range applications, and is ideal for power-sensitive designs that require transceivers up to 12.5 Gbps. At 10G data rates, Arria® V GZ FPGA consumes less than 180 mW per channel and at 12.5 Gbps consume less than 200 mW per channel. Arria® V GZ FPGA also offers a lower static power offering with a -3L speed grade.
Arria® V GX and GT FPGA offers the lowest total power for mid-range applications by using the 28 nm low power process to deliver the lowest static power, offering the lowest power transceivers for speeds up to 10.3125 Gbps, and providing superior fabric with hard IP designed to lower dynamic power. Arria® V devices provide a 40% on average power reduction compared to the previous generation of midrange FPGA.
Customizable ARM* Processor-Based SoC FPGA
Intel® SoC FPGA lets you reduce system power, system cost, and board space by integrating a hard processor system (HPS) – consisting of processors, peripherals, and memory controller – with the FPGA fabric using a high-bandwidth interconnect backbone. The combination of the HPS with Intel's 28 nm low-power FPGA fabric provides the performance and ecosystem of an applications-class ARM* processor with the flexibility and digital signal processing (DSP) richness of the Arria® V FPGA.
Easy Migration Path to Intel® Arria® 10 SoC FPGA
The Arria® V SoC FPGA and Intel® Arria® 10 SoC FPGA utilize the same dual-core ARM* Cortex*-A9 MPCore* processor. Therefore, when your Arria® V SoC FPGA design is ready for a performance upgrade you can easily migrate your software to the Intel® Arria® 10 SoC FPGA. Based on the TSMC 20 nm process, the Intel® Arria® 10 SoC FPGA offers for a performance upgrade path for Arria® V SoC FPGA designs with easy software migration.
Industry’s Highest Performance 28 nm SoC FPGA
- Up to 1.05 GHz dual-core ARM* Cortex*-A9 MPCore* processor
- Four hardened 32-bit memory controllers with up to 533 MHz memory bus speed and optional error correction code (ECC)
- Processor to FPGA interconnect with >125 Gbps peak total bandwidth
Lowest System Power for Midrange Applications
- Integration of multiple components into a single chip
- Lowest power transceivers with speeds up to 10.3125 Gbps
- Based on low power TSMC 28LP process
Multiple Benefits to System Cost
- Integration of multiple components into a single chip
- PCB cost and trace savings from integration of processor, FPGA and DSP into a single device
- No power-off sequencing requirements
Not All SoC FPGA Are Created Equal. Architecture Matters.
SoC FPGA are more than the sum of their parts. It is critically important to understand how the processor and FPGA systems work together to accomplish each task. When you choose an SoC FPGA for your next design, architecture matters. Intel® SoC FPGA are designed to:
- Preserve the flexibility of processor boot / FPGA configuration sequence, system response to processor reset, and independent memory interfaces of a two-chip solution.
- Maintain data integrity and reliability with integrated ECC.
- Protect DRAM memory shared by the processor and FPGA with an integrated memory protection unit.
- Enable system-level debug with Intel's FPGA-adaptive debugging for unmatched visibility and control of the whole device.
Learn how to choose the right SoC FPGA for your application from our extensive set of resources, including a short series of videos from processor expert Jim Turley.
Features
Flexible Transceivers
Whether you need a few channels of transceivers, or up to 36, Arria® V FPGA provides transceiver solutions to meet your performance and power requirements to deliver exactly what you need to succeed.
Variable-Precision DSP Block
Arria® V FPGA and SoC FPGA feature the industry's first variable-precision digital signal processing (DSP) block.
SoC FPGA Hard Processor System
Intel® SoC FPGA integrates an ARM* -based hard processor system (HPS) consisting of processor, peripherals, and memory interfaces with the FPGA fabric using a high-bandwidth interconnect backbone.
Temperature Support
Arria® V SoC FPGA Hard Processor System Overview
| Device | All Arria® V SoC FPGA Devices (SX, ST) |
|---|---|
| Processor | Dual-core ARM* Cortex*-A9 MPCore* processor with ARM* CoreSight* debug and trace technology
|
| Coprocessors | ARM* NEON* media processing engine with Vector Floating-Point (VFP) v3 double-precision floating point unit for each processor, Snoop Control Unit (SCU), Acceleration Coherency Port (ACP) |
| Level 1 cache | 32 KB L1 instruction cache, 32 KB L1 data cache |
| Level 2 cache | 512 KB shared L2 cache |
| On-chip memory | 64 KB on-chip RAM, 64 KB on-chip ROM |
| HPS hard memory controller | Multiport SDRAM controller with support for DDR2, DDR3, DDR3L, and LPDDR2 with optional error correction code (ECC) support |
| Quad serial peripheral interface (SPI) flash controller | Supports SPIx1, SPIx2, or SPIx4 (quad SPI) serial NOR flash devices Up to four chip selects |
| SD/SDIO/MMC controller | Supports SD, eSD, SDIO, eSDIO, MMC, eMMC, and CE-ATA with integrated DMA |
| NAND flash controller | Supports 8 bit ONFI 1.0 NAND flash devices Programmable hardware ECC for Single-Level Cell (SLC) and Multi-Level Cell (MLC) devices |
| Ethernet media access controller (EMAC) | 2 x 10/100/1000 EMAC with RGMII external PHY interface and integrated DMA |
| USB On-The-Go controller (OTG) | 2 x USB 2.0 OTG controllers with ULPI external PHY interface and integrated DMA |
| UART controller | 2 x UART 16550 compatible |
| SPI controller | 2 x SPI masters 2 x SPI slaves |
| I2C controller | 4 x I2C |
| General-purpose I/O (GPIO) | Up to 71 GPIO and 14 input-only pins, with digital de-bounce and configurable interrupt mode |
| Direct memory access (DMA) controller | 8-channel direct memory access (DMA) Supports flow control with 31 peripheral handshake interfaces |
| Timers | Private interval and watchdog timer for each processor Global timer for processor subsystem 4X general-purpose timers 2X watchdog timers |
| Maximum HPS I/O | 208 |
| HPS phased-locked loops (PLLs) | 3 |
Ecosystem
Intel® SoC FPGA are ARM* processor-based and inherit the strength of the ARM* ecosystem. Intel, our ecosystem partners, and the Intel® SoC FPGA user community provide a wide range of options to meet your SoC FPGA development needs. There are a number of options for operating systems, development tools, intellectual property (IP) cores, and professional services. Many are provided by ecosystem partners.
Operating Systems
Arria® V SoC FPGA includes a sophisticated high-performance multicore ARM* Cortex*-A9 MPCore* processor. This processor can be used for a wide range of functions from very simple bare-metal applications running on one of the available cores to high-bandwidth, low-latency , real-time operations.
Development Tools
For professional quality development tools including JTAG debuggers and instruction trace functions.
IP Cores
Intel® SoC FPGA is supported by a wide range of Intel® FPGA and third-party soft Intellectual Property (IP) cores. These blocks can be instantiated in the FPGA portion of the SoC FPGA device.
Nios® II Soft Processor
The Nios® II processor, the world's most versatile processor, according to Gartner Research, is the most widely used soft processor in the FPGA industry.
Design Services Network
Design Service Network (DSN) members offer an extensive portfolio of design services, IP, and products that can help customers meet challenging product development needs, lower risk, and accelerate time to market.
Boards
Intel® SoC FPGA-based boards are available from Intel and ecosystem partners. Boards can be standalone or system on module (SoM) configuration.
Applications
Wireless Communications
Remote radioheads, RF cards and channel cards, Mobile backhaul.
Wireline Communications
20G/40G bridging and switching, 20G packet processing, Gigabit-capable passive optical network (GPON).
Broadcast
Digital modulation equipment (including EdgeQAM and satellite and terrestrial broadcast), Pro audio/visual (A/V) switches, Video conferencing, PCIe capture and cameras.
Computer & Storage
Custom storage, Flash memory cache, Plug-in cards.
Military
Guidance control, Tactical electronic warfare, Custom storage, Electro-optical/infrared (OR/IR) systems.
Test & Medical
Ultrasound, CT scanning, Other diagnostic imaging, Portable and wireless tests.
Industrial & Consumer
Human-machine interface, I/O companion, High-end display, High-end video surveillance.
Design Tools
Intel® Quartus® Prime Software Suite
Intel® Quartus® Prime Software Suite provides everything you need to design with Intel® SoC FPGA. It is a complete development package that comes with a user-friendly GUI and technology to help you turn your ideas into reality. The Intel® Quartus® Prime software includes productivity tools to make it easy to build your design, such as:
- Intel® FPGA SDK for OpenCL™ Technology
- Platform Designer (formerly Qsys)
- System Console debugging toolkit
- Transceiver Toolkit
- Timing Analyzer
- Power Analyzer
Intel® SoC FPGA Embedded Development Suite
Jump start your firmware and application software development with our Intel® SoC FPGA Embedded Development Suite (SoC EDS), a comprehensive tool suite with:
- Development tools
- Utility programs
- Run-time software
- Application examples
At the heart of the SoC EDS is the exclusive ARM* Development Studio 5* (DS-5*) Intel® SoC FPGA Edition. This toolkit combines the ARM* DS-5* advanced multicore debugging capabilities with FPGA-adaptivity for unprecedented full-chip debugging visibility and control.
Additional Resources
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