Product Collection
Marketing Status
Launched
Launch Date
2009
Lithography
60 nm

Resources

Logic Elements (LE)
109000
Fabric and I/O Phase-Locked Loops (PLLs)
8
Maximum Embedded Memory
5.49 Mb
Digital Signal Processing (DSP) Blocks
280
Digital Signal Processing (DSP) Format
Multiply
Hard Memory Controllers
No
External Memory Interfaces (EMIF)
DDR, DDR2, SDR

I/O Specifications

Maximum User I/O Count
475
I/O Standards Support
3.0 V to 3.3 V LVTTL, 1.2 V to 3.3 V LVCMOS, PCI, PCI-X, SSTL, HSTL, Differential SSTL, Differential HSTL, LVDS, Mini-LVDS, RSDS, LVPECL, BLVDS, PPDS
Maximum LVDS Pairs
118
Maximum Non-Return to Zero (NRZ) Transceivers
8
Maximum Non-Return to Zero (NRZ) Data Rate
3.124 Gbps
Transceiver Protocol Hard IP
PCIe Gen1

Advanced Technologies

FPGA Bitstream Security
No
Analog-to-Digital Converter
No

Package Specifications

Package Options
F484, F672, F896