Article ID: 000074747 Content Type: Troubleshooting Last Reviewed: 07/31/2017

Why does SDI transmitter lose sync after reconfiguring fPLL fractional division?

Environment

  • fPLL Intel® Arria® 10 Cyclone® 10 FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    You may see SDI transmitter lose sync due to unstable frequency after reconfiguring fPLL fractional division.

    Resolution

    To work around this issue, ensure you recalibrate after reconfiguring fPLL fractional division.

    Related Products

    This article applies to 1 products

    Intel® Arria® 10 FPGAs and SoC FPGAs