Due to a problem with the Intel® Quartus® Prime Pro software version 18.1, you may see the above error in the IP Parameter Editor System Messages pane when trying to generate a 25G Ethernet Intel® Stratix® 10 FPGA IP instance for an Intel® Stratix® 10 device with H-Tile ES1 or ES2 silicon.
To work around this problem, you must either target an Intel Stratix 10 device with H-Tile ES3 or Production silicon when creating your project in Intel Quartus Prime Pro software or you can install the patch below for Intel Quartus Prime Pro v18.1.
This problem is scheduled to be fixed in a future release of the Intel Quartus Prime software.