Article ID: 000075553 Content Type: Troubleshooting Last Reviewed: 01/07/2019

Why do I see fitter errors when I swap TX channels in the Intel® FPGA HDMI Design Example for Intel® Arria® 10 Devices?

Environment

  • Intel® Quartus® Prime Pro Edition
  • HDMI Intel® FPGA IP
    • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    When using the Intel® FPGA HDMI Design Example for Intel® Arria® 10 devices, the transceiver PHY uses Bonding mode, thus the channel placement must be contiguous and in an ascending order from bottom to top for the Intel® Arria® 10 devices.

    Related Products

    This article applies to 1 products

    Intel® Arria® 10 FPGAs and SoC FPGAs

    Need more help?

    Contact support

    Disclaimer

    1

    All postings and use of the content on this site are subject to Intel.com Terms of Use.