Description
The APEX 20K PLL is made up of several voltage-controlled oscillator (VCO) stages that combine to create the output frequency range of the PLL.
If the input clock is disabled or cut-off in user mode, the PLL will continue to generate a clock. The frequency of that generated clock will drift lower than the desired output frequency, but the final frequency varies over process, voltage, and temperature which makes it unpredictable.