Article ID: 000076398 Content Type: Product Information & Documentation Last Reviewed: 03/31/2014

How is the voltage selected for the VCCRSTCLK_HPS pin in the Pin-Out File (.pin) generated by the Quartus II software?

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    When using Cyclone® V or Arria® V devices that support the Hard Processor System (HPS), the .pin file created by the Quartus® II software will select from various voltages for the VCCRSTCLK_HPS pin.

    Supported voltages are 1.8V, 2.5V, 3.0V, and 3.3V. 

    The Quartus II software does not provide you the option to specify the voltage for the clock and reset pins in the HPS that use the VCCRSTCLK_HPS supply. You must connect a supported voltage to the VCCRSTCLK_HPS pin based on the requirements of the I/O standard used by the HPS clock and reset pins (HPS_CLK1, HPS_CLK2, HPS_nRST, HPS_nPOR, and HPS_PORSEL).

    The voltage shown for the VCCRSTCLK_HPS pin in the .pin file is based on the FPGA configuration I/O voltage selected for the device project.  If no configuration voltage is selected, the .pin file will show 1.8V/2.5V/3.0V/3.3V for the VCCRSTCLK_HPS pin.  If a configuration I/O voltage is selected, the .pin file will show the same voltage on VCCRSTCLK_HPS as VCCPGM. 

    There is no requirement to have VCCRSTCLK_HPS powered by the same voltage as VCCPGM.  You must connect the VCCRSTCLK_HPS pin to a voltage based on the requirements of the I/O standard used by the HPS clock and reset pins.

    Related Products

    This article applies to 5 products

    Cyclone® V SE SoC FPGA
    Arria® V ST SoC FPGA
    Arria® V SX SoC FPGA
    Cyclone® V ST SoC FPGA
    Cyclone® V SX SoC FPGA