Article ID: 000076449 Content Type: Troubleshooting Last Reviewed: 01/12/2023

Why does the Intel® Quartus® Prime Pro Edition Software version 17.1 or later generate a message stating that CvP mode is only supported with AS configuration mode, when enabling CvP mode for Intel® Arria® 10 devices?

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 17.1 or later, when targeting an Intel® Arria® 10 device you might get a message stating: "CVP mode or CVP_CONFDONE pin is supported in Active Serial (AS) configueration scheme only" when you try to enable CvP mode in the GUI after selecting Passive Serial (PS) or Fast Passive Parallel (FPP) configuration modes. 

    This is incorrect. You can use PS, FPP, or AS modes to load the I/O ring when when using CvP Init Mode with Intel Arria 10 devices.

    Resolution

    To work around this, do the following:

    1. Set your desired configuration scheme in the Intel® Quartus® Prime Pro Edition Software device settings.
    2. Edit the qsf file manually by adding the following lines:

    set_global_assignment -name CVP_CONFDONE_OPEN_DRAIN ON

    set_global_assignment -name CVP_MODE "CORE INITIALIZATION"

    set_global_assignment -name ENABLE_CVP_CONFDONE ON

    This problem is fixed starting from the Intel Quartus Prime Pro Edition Software version 18.0.

     

    Related Products

    This article applies to 1 products

    Intel® Arria® 10 FPGAs and SoC FPGAs