Article ID: 000078569 Content Type: Troubleshooting Last Reviewed: 02/13/2006

Can Stratix™ devices lock onto a spread spectrum input clock?

Environment

  • PLL
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description Yes, while the Stratix device will not be able to automatically detect that the input is a spread spectrum clock, it will be able to acquire a lock if the spread spectrum clock is within the input jitter specification of the phase-locked loop (PLL).

    Related Products

    This article applies to 1 products

    Stratix® FPGAs