Article ID: 000079349 Content Type: Troubleshooting Last Reviewed: 02/08/2013

Values of rx_signaldetect are always high in post-fit simulation models that target Arria V devices with custom PHY IP cores

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    If you use Mentor Graphics® ModelSim-Altera® to perform a post-fit simulation for a custom PHY IP core that targets an Arria V device and the sd_on value in the av_xcvr_native.sv file is set to a value of 16 (the default value is 16), the rx_signaldetect value is always high regardless of whether the rx_serial_data signal is 0, 1, x or z.

    Resolution

    Update your Quartus II Settings File (.qsf) with the following settings:

    1. Set the pdb_sd parameter to false.
    2. Add the QSF assignment set_instance_assignment -name XCVR_RX_SD_ENABLE ON -to * to turn on the Secure Digital (SD) unit.
    3. To set the sd_on value to 1, add the QSF assignment set_instance_assignment -name XCVR_RX_SD_ON 1 -to *.

    Related Products

    This article applies to 1 products

    Arria® V FPGAs and SoC FPGAs