When using differential standards on dedicated clock input pins in the top and bottom banks in Stratix® III and Stratix IV devices, they are powered by the differential clock power supply VCC_CLKIN, which must be connected to 2.5V. VCC_CLKIN is independent of VCCIO and VCCPD.
When using differential inputs in the top and bottom banks, the input buffers are powered by VCCPD, which must be connected to 2.5V.
When using differential outputs in the top and bottom banks, the output buffers are powered by VCCIO, which must be connected to 2.5V.
When using differential inputs in the side banks, the input buffers are powered by VCCPD, which must be connected to 2.5V.
When using differential outputs in the side banks, the output buffers are powered by VCCIO, which must be connected to 2.5V.