Arria® V, Cyclone® V and Stratix® V devices remote update circuitry can only handle 24-bit addressing. For configuration devices such EPCS128 or EPCQ128 and smaller density configuration devices using 24-bit addressing, the 24-bit PGM[23:0] field corresponds to all 24 bits of the active serial starting address. However for EPCQ256 devices that use 32-bit addressing, the PGM[23:0] field corresponds to the 24 MSB of the active serial starting address. Thus the 32-bit address would be {pgm[23:0], 8’b0}.
In the altremote_update module in the Quartus® II software version 13.0 or earlier, the data_in[] bus is 24-bit width. Thus for EPCQ256 devices, you will need to truncate the lowest 8 LSB when writing the application image boot address during factory image.
For example if the boot address is 0x00020000, then you need to set the 0x000200 into data_in[23..0] of the megafunction.
For example if the boot address is 0x01C00000, then you need to set the 0x01C000 into data_in[23..0] of the megafunction.
From Quartus II software version 13.1 and onwards, the data_in[] bus widths are as follow:
• 24-bit bus width when using 3-byte addressing configuration device, for example EPCS128.
• 32-bit bus width when using 4-byte addressing configuration device, for example EPCQ256.
Thus in Quartus II software version 13.1 and onwards you no longer need to truncate the lowest 8 LSB when writing the application image boot address during factory image.