You might see this error when compiling a design targeting -V (SmartVID) enabled devices— Intel® Stratix® 10 FPGAs and Intel Agilex® FPGAs in the Intel® Quartus® Prime Pro Edition Software if you have not assigned the SmartVID power management signals to SDM_IO and/or have not appropriately configured the Power Management and VID section in your project.
In the Intel® Quartus® Prime Pro Edition Software, you must assign the SmartVID power management signals to appropriate SDM_IO pins under Assignments -> Device -> Device & Pin Options -> Configuration -> Configuration Pin Options. In addition, when operating in PMBus Host/Agent mode, you must assign a non-zero address to the device address under Assignments -> Device -> Device & Pin Options -> Power Management and VID.