Article ID: 000087187 Content Type: Troubleshooting Last Reviewed: 04/14/2023

Why might I see an occasional high Bit Error Rate (BER) after power-up or user-mode calibration of my Intel® Arria® 10 or Intel® Cyclone® 10 GX device RX simplex transceiver?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Generic Component
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a bug in the Intel® Arria® 10 or Intel® Cyclone® 10 GX device calibration code, you might see a high BER after power-up or user-mode calibration of an RX simplex transceiver, when the corresponding unused transmitter is preserved with one of the following Quartus® Prime Settings File (QSF) assignments.

     

    Global preservation QSF assignment

    set_global_assignment –name PRESERVE_UNUSED_XCVR_CHANNEL ON

    Per-pin preservation QSF assignment

    set_instance_assignment –name PRESERVE_UNUSED_XCVR_CHANNEL ON –to <pin name>

     

    The simplex receiver channel might not be calibrated correctly if its corresponding unused transmitter is preserved. Simplex receiver channels whose corresponding transmitters are not preserved are calibrated correctly.

    Resolution

    You can use one of the following methods to work around this problem:

    • In cases where the unused transmitter will never be used, and does not need to be preserved, remove the QSF assignment for the corresponding transmitter pin.
    • In cases where the unused transmitter may be used in the future and preservation is required, instantiate a minimum data rate, dummy simplex transmitter corresponding to the used simplex receiver. Set a static 0x00 pattern on the Tx parallel port, and select minimum VOD.
    • This problem is fixed in the Intel® Quartus® Prime Software v19.1.

    Related Products

    This article applies to 2 products

    Intel® Arria® 10 FPGAs and SoC FPGAs
    Intel® Cyclone® 10 FPGAs