Article ID: 000092736 Content Type: Troubleshooting Last Reviewed: 08/15/2023

Why doesn’t the rx_ready signal status go high when dynamic reconfiguration from high speeds (>6G) to low speeds (<=6G) is performed in the CPRI Multirate Design Example?

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.3, the rx_ready status signal will not go high in the CPRI Multirate Design Example when dynamically reconfiguring from high speeds (>6G) to low speeds (<=6G).

    Resolution

    To work around this problem in the Intel® Quartus® Prime Pro Edition Software version 22.3 when you are dynamically reconfiguring the CPRI rate from the high-speed variant (>6G) to the low-speed variant (<=6G), follow the steps below.

    1. Download the workaround script ftile-cpri-dr-test.tcl
    2. Navigate to <your_example_design_directory>/hardware_test_design/hwtest/
    3. Replace the file “ftile_cpri_dr_test.tcl” with the downloaded file.

    The major changes in the workaround script are the two FGT Attribute Access commands asserted in 6Gbps and below CPRI rates:

    • CPI_assert_req 0 $RESET_LANE($lane_number)
    • CPI_assert_req 0 $SET_MODE_BYPASS($lane_number)

    This problem is fixed beginning with the Intel® Quartus® Prime Pro Edition Software version 22.4.

    Related Products

    This article applies to 2 products

    Intel Agilex® 7 FPGAs and SoC FPGAs F-Series
    Intel Agilex® 7 FPGAs and SoC FPGAs I-Series