Intel® FPGA Design Examples
Intel® design examples provide efficient solutions for common design challenges. These designs can be used as a starting point for developing with your unique system and are available using many functions such as filters, arithmetic functions, error detection/correction, modulation/demodulation, and video and image processing.
Design examples are also available in the Design Store for Intel® FPGAs and RocketBoards.org.
TFT LCD Controller Reference Design Overview and Related Links | Intel
Last Updated: 03/09/2022
Learn in this overview how the Digital Blocks TFT LCD Controller reference design enables you to accelerate the design-in of TFT LCD panel displays in your system.
SignalTap* II State-Based Triggering Flow Design Example | Intel
Last Updated: 03/08/2022
The state-based triggering flow allows you to define a custom triggering flow to organize triggering conditions. These examples show templates for common triggering flow scenarios.
Drive-on-a-Chip Multi-Axis Motor Control Overview and Features | Intel
Last Updated: 03/08/2022
The Intel drive-on-a-chip motor control reference design is an integrated drive system on a single Cyclone V SoC or Intel MAX 10. Learn more in this guide.
PCI* Express to External Memory Reference Design Example | Intel
Last Updated: 03/08/2022
Intel offers a PCI Express (PCIe*) to External Memory reference design that demonstrates the operation of PCIe-based MegaCore function with a DDR2 or DDR3 SDRAM memory controller.
Single-Port Triple-Speed Ethernet On-Board PHY Chip | Intel
Last Updated: 03/08/2022
Single-Port Triple-Speed Ethernet On-Board PHY Chip datapath reference design provides a simple and quick way to implement your own Ethernet-based design in an Intel FPGA.
10-Gbps Ethernet Hardware Demonstration Reference Design | Intel
Last Updated: 03/08/2022
10-Gbps Ethernet Hardware Demonstration reference design provides a quick way to implement your 10-Gbps Ethernet (10GbE)-based design in an Intel FPGA.
Automotive Digital Radar Reference Design Overview and Features | Intel
Last Updated: 03/08/2022
Follow this guide to learn how the automotive digital radar reference design quickly develops and verifies hardware accelerators using our advanced development tools.
Timing Analyzer Set Multicycle Path Command
Last Updated: 12/21/2021
Timing Analyzer Set Multicycle Path Command
Timing Analyzer Maximum and Minimum Delay Commands
Last Updated: 12/21/2021
SDC min and max delay description.
Timing Analyzer Set False Path Command
Last Updated: 12/21/2021
Timing Analyzer Set False Path Command