This example describes a single-bit wide, 64-bit long shift register in VHDL. Synthesis tools are able to detect groups of shift registers and automatically infer the altshift_taps megafunction. The implementation may be done in device block memory resources depending on the target device architecture.
Download the files used in this example:
The use of this design is governed by, and subject to, the terms and conditions of the Intel® Design Example License Agreement.
Table 1 lists the ports in the 1x64 shift register design.