Intel® FPGA Package and Thermal Information

Package information includes the ordering code reference, package acronym, leadframe material, lead finish (plating), JEDEC® outline reference, lead coplanarity, weight, moisture sensitivity level, and other special information. The thermal resistance information includes device pin count, package name, and resistance values.

  

Table 1 - Package and Thermal Information2

Intel® Agilex™ Series1

Intel® Stratix® Series

Intel® Arria® Series

Intel® Cyclone® Series

Intel® MAX® Series

Serial Configuration Devices

Package Mechanical Drawings1

Intel® Stratix® 10 devices

Intel® Arria® 10 devices

Intel® Cyclone® 10 devices

Intel® MAX® 10 devices

EPCQ-A

Package Ball Coordinate Lists1

Stratix® V devices

Arria® V devices

Cyclone® V devices

MAX® V devices

EPCQ-L

Manufacturing Advantage Services (MAS)1

Stratix® IV devices

Arria® II devices

Cyclone® IV devices

MAX® II devices

EPCQ

Compact Thermal Models1

Stratix® III devices

 

Cyclone® III devices

 

EPCS
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Note 1 – Package Mechanical Drawings and Thermal Models for Intel® Agilex™ Devices are restricted access, please sign in or register to access.

Table 2 - Package and Thermal Technical Documentation

Application Notes and White Papers

AN752: Guidelines for Handling Intel® FPGA Wafer level chip scale package
(This application note provides guidelines for handling Intel FPGA's Wafer Level Chip Scale Package (WLCSP) components.)

AN657: Thermal management and mechanical handling for Intel FPGA TCFCBGA devices
(This application note provides guidance on thermal management and mechanical handling of thermal composite flip chip ball-grid array (TCFCBGA) for Intel FPGA devices.)

AN659: Thermal management and mechanical handling for lidless flip chip ball-grid array
(This application note provides guidance on thermal management and mechanical handling of lidless flip chip ball-grid array (FCBGA) for Intel FPGA devices.)

AN 114: Designing with high-density BGA packages for Intel devices

AN 353: SMT board assembly process recommendations

AN 71: Guidelines for handling J-Lead, QFP, BGA, FBGA, and lidless devices

Challenges in manufacturing reliable lead-free and RoHS-compliant components
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Note 2 - For other devices not listed in Table 1, please see the Package Information Datasheet for Mature Devices, or visit the Intel® FPGA Device Support Resources to find more information about Mature and Legacy Device Support Collections.