Nios® II Embedded Design Suite Support
Intel® FPGA provides extensive documentation and support for the Nios II family of embedded processors to help you quickly and easily develop and debug your embedded processor systems.
You can download and license the Nios II embedded processor toolchain from this page. The links below offer complete documentation on the Nios II processor, answers to commonly asked questions, tutorials, online demonstrations, design examples, reference designs, and white papers.
Information on training classes, demonstrations, and product ordering information are also provided below.
General Information
Errata Sheets
- Nios II Embedded Design Suite Release Notes and Errata ›
- MegaCore IP Library Release Notes and Errata (contains Nios II processor MegaCore function information) ›
Embedded Whitepapers
- A Flexible Solution for Industrial Ethernet ›
- The “Energy Aware” Appliance Platform ›
- Adding Hardware Accelerators to Reduce Power in Embedded Systems ›
- Implementing a Cost-Effective Human-Machine Interface for Home Appliances ›
- Generating Panoramic Views by Stitching Multiple Fisheye Images ›
- Using FPGAs to Render Graphics and Drive LCD Interfaces ›
- A Flexible Architecture for Fisheye Correction in Automotive Rear-View Cameras ›
- Selecting the Right High-Speed Memory Technology for Your System ›
- Automated Generation of Hardware Accelerators With Direct Memory Access From ANSI/ISO Standard C Functions ›
Embedded Documentation One-Click Download
These files provide a snapshot of the Nios II processor, Nios II-dependent GNU toolchain, Qsys, and embedded peripherals documentation. After extracting the files, refer to documentation.htm for a list of included documents. To download the files, please click HERE.
Product and Ordering Information
Embedded Training And Demonstrations
Embedded Design Examples and Reference Designs
Nios II Benchmark and Other Documentation
Application Notes
- AN 595: Vectored Interrupt Controller Usage and Applications ›
- AN 595 Design Files ›
- AN 548: Nios II Compact Configuration System for Cyclone® III ›
- AN 548 Design Files ›
- AN 543: Debugging Nios II Software Using the Lauterbach Debugger ›
- AN 543 Design Files ›
- AN 531: Reducing Power with Hardware Accelerators ›
- AN 531 Design Files ›
- AN 459: Guidelines for Developing a Nios II HAL Device Driver ›
- AN 459 Design Example ›
- AN 458: Alternative Nios II Boot Methods ›
- AN 458 Design Files ›
- AN 446: Debugging Nios II Systems with the SignalTap* II Embedded Logic Analyzer ›
- AN 446 Design Files ›
- AN 440: Accelerating Nios II Networking Applications ›
- AN 440 Design Files ›
- AN 429: Remote Configuration Over Ethernet with the Nios II Processor ›
- AN 429 Design Files ›
- AN 417: Accelerating Functions with the C2H Compiler:Scatter-Gather DMA with Checksum ›
- AN 417 Design Files ›
- AN 391: Profiling Nios II Systems ›
- AN 391 Design Files ›
- AN 350: Upgrading Nios Processor Systems to the Nios II Processor ›
- AN 346: Using the Nios II Configuration Controller Reference Designs ›
- AN 371: Automotive Graphics System Reference Design ›
- AN 527: Implementing an LCD Controller ›
Tutorials
- Creating Multiprocessor Nios II Systems Tutorial ›
- Multiprocessor Design File ›
- My First Nios II Software Tutorial ›
- Nios II Hardware Development Tutorial ›
- Hardware Tutorial Design Files ›
- Nios II System Architect Design Tutorial ›
- Nios II Architect Design Tutorial Design Files ›
- Using MicroC/OS-II RTOS with the Nios II Processor Tutorial ›
- Using Nios II Floating-Point Custom Instructions Tutorial ›
- Using Nios II Tightly Coupled Memory Tutorial ›
- Tightly Coupled Memory Tutorial Design Files ›