With its mix of low price, low power, and on-chip features, MAX® V CPLDs deliver the market's best value. Featuring a unique, non-volatile architecture, MAX V devices provide robust new features at up to 50% lower total power compared to competitive CPLDs.
Learn more about all device variations and how specifications compare.
When you use MAX V devices, you'll enjoy lower total system cost because the MAX V architecture integrates previously external functions, such as flash, RAM, oscillators, and phase-locked loops. MAX® V CPLDs deliver a large number of I/Os and logic per footprint. The devices also use low-cost and green packaging technology, with packages as small as 20 mm.
With MAX® V CPLDs, you'll get robust new features at up to 50 percent lower total power vs. other equivalent-density CPLDs on the market.
Built on a mature and low-cost wafer fab process, MAX® V CPLDs leverage a proven architecture while delivering robust features including:
MAX® V CPLDs are supported with free Quartus Prime Lite Edition software. With Quartus Prime software, you'll get productivity enhancements resulting in faster simulation, faster board bring-up, and faster timing closure. This software also comes with a system-level integration tool called Qsys, delivering higher circuit performance while also enabling you to design at a higher level of abstraction.
MAX V devices are ideal for general-purpose and power-and space-constrained designs in many market segments.
Here are some resources to help you get started designing with MAX® V CPLD devices.
Learn the details about the download cable options for programming MAX® V CPLDs.
Learn how Intel® Quartus® Prime Software supports MAX® V CPLD designs.
Estimate power consumption for your MAX® V CPLD design.
Are you new to programmable logic? New to the Intel® Quartus® Prime Software? Watch these self-paced, online demonstrations to learn how to become a programmable logic designer in about one hour.
Select off-the-shelf IP core functions from us and our partners. IP cores are optimized for ourdevices, reducing design and test time, and can be evaluated in hardware and simulation prior to licensing.
Perform I/O decoding, efficiently increasing the available I/O capability of another standard device at a low cost.
Translate bus protocols and voltages between incompatible devices at the lowest possible cost.
Translate bus protocols and voltages between incompatible devices at the lowest possible cost.
Control the configuration or initialization of other devices on the board.
Control the configuration or initialization of other devices on the board.
Find technical documentation, videos, and training courses for your Intel® MAX® V CPLD designs.