Cyclone® V FPGA –AN 669: Drive-On-Chip Motor Control with Vibration Suppression and Autonomous DC-DC Control (Tandem) Design Example

Cyclone® V FPGA –AN 669: Drive-On-Chip Motor Control with Vibration Suppression and Autonomous DC-DC Control (Tandem) Design Example

742049
11/23/2022

Introduction

The design demonstrates the concurrent multiaxis control of two three-phase permanent magnet synchronous motors (PMSMs) or sinusoidally wound brushless DC (BLDC) motors.

Design Details

Device Family

Cyclone® V SX SoC FPGA

Cyclone® V FPGAs and SoC FPGAs

Quartus Edition

Intel® Quartus® Prime Standard Edition

Quartus Version

17.0.2

Other Tags

Intel® Programmable Devices

Intel® FPGA Intellectual Property

Intel® FPGA Development Kits

IP Cores (0)

Detailed Description

Drive-on-Chip design example for Cyclone V SoC development kit and Terasic Tandem Motion-Power 48V HSMC power board demonstrates multi axis motor control and multi phase bi-directional DC-DC conversion. This new version includes vibration suppression and a high frequency autonomous DC-DC control IP. Users are recommended to run this design in Windows with Quartus version 17.0.2.

Design Details

Device Family

Cyclone® V SX SoC FPGA

Cyclone® V FPGAs and SoC FPGAs

Quartus Edition

Intel® Quartus® Prime Standard Edition

Quartus Version

17.0.2

Other Tags

Intel® Programmable Devices

Intel® FPGA Intellectual Property

Intel® FPGA Development Kits