Quartus® Prime Pro Edition User Guide: PCB Design Tools

ID 683768
Date 4/01/2024
Public
Document Table of Contents

4.3.1. Integrating Intel FPGA Designs

To integrate an Intel FPGA design starting in the Quartus® Prime software through to a circuit schematic in the Cadence Allegro Design Entry HDL software or the Cadence Allegro Design Entry CIS software, follow these steps:
  1. In the Quartus® Prime software, compile your design to generate a Pin-Out File (.pin) to transfer the assignments to the Cadence software.
  2. If you are using the Cadence Allegro Design Entry HDL software for your schematic design, follow these steps:
    1. Open an existing project or create a new project in the Cadence Allegro Project Manager tool.
    2. Construct a new symbol or update an existing symbol using the Cadence Allegro PCB Librarian Part Developer tool.
    3. With the Cadence Allegro PCB Librarian Part Developer tool, edit your symbol or fracture it into smaller parts (optional).
    4. Instantiate the symbol in your Cadence Allegro Design Entry HDL software schematic and transfer the design to your board layout tool.
  3. If you are using the Cadence Allegro Design Entry CIS software for your schematic design, follow these steps:
    1. Generate a new part in a new or existing Cadence Allegro Design Entry CIS project, referencing the .pin output file from the Quartus® Prime software. You can also update an existing symbol with a new .pin.
    2. Split the symbol into smaller parts as necessary.
    3. Instantiate the symbol in your Cadence Allegro Design Entry CIS schematic and transfer the design to your board layout tool.