Intel® FPGA SDK for OpenCL™: Intel® Arria® 10 SoC Development Kit Reference Platform Porting Guide

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ID 683788
Date 10/08/2019
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Document Table of Contents
Document Table of Contents x
1. Intel® FPGA SDK for OpenCL™ Intel® Arria® 10 SoC Development Kit Reference Platform Porting Guide 2. Developing an Intel Arria 10 SoC Custom Platform 3. Building the Software and SD Card Image for the Intel® Arria® 10 SoC Development Kit Reference Platform 4. Intel® FPGA SDK for OpenCL™ Intel® Arria® 10 SoC Development Kit Reference Platform Porting Guide Archives 5. Document Revision History for Intel® FPGA SDK for OpenCL™ : Intel® Arria® 10 SoC Development Kit Reference Platform Porting Guide
1. Intel® FPGA SDK for OpenCL™ Intel® Arria® 10 SoC Development Kit Reference Platform Porting Guide x
1.1. Intel Arria 10 SoC Development Kit Reference Platform: Prerequisites 1.2. Features of the Intel Arria 10 SoC Development Kit Reference Platform 1.3. Intel Arria 10 SoC Development Kit Reference Platform Board Variants 1.4. Contents of the Intel Arria 10 SoC Development Kit Reference Platform 1.5. Changes in Intel Arria 10 SoC Development Kit Reference Platform from 17.0 to 17.1 1.6. Changes in Intel Arria 10 SoC Development Kit Reference Platform from 17.1.2 to 18.0
2. Developing an Intel Arria 10 SoC Custom Platform x
2.1. Initializing an Intel Arria 10 SoC Custom Platform 2.2. Modifying Your Intel Arria 10 SoC Custom Platform 2.3. Integrating Your Intel Arria 10 SoC Custom Platform with the Intel® FPGA SDK for OpenCL™ 2.4. Changing the Device Part Number 2.5. Modifying the Kernel PLL Reference Clock 2.6. Modifying the Hard Processor System 2.7. Guaranteeing Timing Closure in the Intel Arria 10 SoC Custom Platform 2.8. Generating the base.qar Post-Fit Netlist for Your Intel Arria 10 SoC FPGA Custom Platform
3. Building the Software and SD Card Image for the Intel® Arria® 10 SoC Development Kit Reference Platform x
3.1. Compiling the Device Tree Blob 3.2. Compiling the Linux Kernel for the Intel Arria 10 SoC Development Kit 3.3. Compiling the OpenCL Linux Kernel Driver 3.4. Generating Full-Chip Programming File for SD Card Image 3.5. Building the SD Card Image 3.6. Known Issues
3.5. Building the SD Card Image x
3.5.1. Layout of the OpenCL Micro SD Card 3.5.2. Creating the SD Card Image 3.5.3. Guidelines on Imaging the Micro SD Card
3.5.2. Creating the SD Card Image x
3.5.2.1. Creating Partition 1 of the SD Card Image 3.5.2.2. Creating Partition 2 of the SD Card Image 3.5.2.3. Creating Partition 3 of the SD Card Image
1. Intel® FPGA SDK for OpenCL™ Intel® Arria® 10 SoC Development Kit Reference Platform Porting Guide
2. Developing an Intel Arria 10 SoC Custom Platform
3. Building the Software and SD Card Image for the Intel® Arria® 10 SoC Development Kit Reference Platform
4. Intel® FPGA SDK for OpenCL™ Intel® Arria® 10 SoC Development Kit Reference Platform Porting Guide Archives
5. Document Revision History for Intel® FPGA SDK for OpenCL™ : Intel® Arria® 10 SoC Development Kit Reference Platform Porting Guide

3.6. Known Issues

Currently, there are several limitations on the usage of the Intel® FPGA SDK for OpenCL™ with the Intel Arria® 10 SoC Development Kit Reference Platform.
  • You cannot override the vendor and board names that the CL_DEVICE_VENDOR and CL_DEVICE_NAME strings of the clGetDeviceInfo() call reports, respectively.
  • If the host allocates constant memory in the shared DDR system (that is, HPS DDR) and it modifies the constant memory after kernel execution, the data in memory might become updated. This issue arises because the FPGA core cannot snoop on CPU-to-HPS DDR transactions.

    To prevent subsequent kernel executions from accessing outdated data, implement one of the following workarounds:

    • Do not modify constant memory after its initialization.
    • If you require multiple __constant data sets, create multiple constant memory buffers.
    • If available, allocate constant memory in the FPGA DDR on your accelerator board.
  • The SDK utility on ARM® only supports the program and diagnose utility commands. The flash, install, and uninstall utility commands are not applicable to the Intel Arria® 10 SoC Development Kit for the following reasons:
    • The install utility has to compile the aclsoc_drv Linux kernel driver and enable it on the SoC. The development machine has to perform the compilation; however, it already contains Linux kernel sources for the SoC. The Linux kernel sources for the development machine are different from those for the SoC. The location of the Linux kernel sources for the SoC is likely unknown to the SDK user. Similarly, the uninstall utility is also unavailable to the Intel Arria® 10 SoC Development Kit.

      Also, delivering aclsoc_drv to the SoC board is challenging because the default distribution of the Intel Arria® 10 SoC Development Kit does not contain Linux kernel include files or the GNU Compiler Collection (GCC) compiler.

    • The flash utility requires placing a .rbf file of an OpenCL design onto the FAT32 partition of the micro SD flash card. Currently, this partition is not mounted when the SDK user powers up the board. Therefore, the best way to update the partition is to use a flash card reader and the development machine.
  • When switching between the Intel® FPGA SDK for OpenCL™ Offline Compiler executable files (.aocx) that correspond to different board variants (that is, a10soc and a10soc_2ddr), you must use the SDK's program utility to load the .aocx file for the new board variant for the first time. If you simply run the host application using a new board variant but the FPGA contains the image from another board variant, a fatal error might occur.
  • When you power up the board, it does not acquire an IP address by default. Invoke the ifup etho command to initiate IP address acquisition.
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