Visible to Intel only — GUID: nik1411172657027
Ixiasoft
Visible to Intel only — GUID: nik1411172657027
Ixiasoft
3.4.1.13. MAC Configuration and Filter Registers
Address |
Name |
Bit |
Description |
HW Reset Value |
Access |
---|---|---|---|---|---|
0x100 |
MAC_VERSION |
[31:0] |
40GbE/100GbE MAC IP core revision. |
0x00DF1310 (40GbE) 0x00DD1310 (100GbE) |
RO |
0x101 |
SCRATCH_MAC |
[31:0] |
Scratch register available for testing. |
0x00000000 |
RW |
0x102 |
MAC_CMD_config | [4] |
When set to 1, the transmit CRC FIFO is cleared. Used for hardware diagnostics. Not required for normal operation. To clear this register bit, write a 0. |
1’b0 |
RW |
[3] |
When set to 1, the statistics counters are reset. This register is self-clearing. |
1’b0 |
RW |
||
[2] |
When set to 1, statistics collection is paused. The underlying counters continue to operate, but the readable values reflect a snapshot at the time the pause flag was activated. Write a 0 to release. |
1’b0 |
RW |
||
[1:0] |
Allows you to override normal transmission for hardware diagnostic purposes: The following patterns are defined:
|
2’b00 |
RW |
||
0x103 |
RX_FILTER_CTRL |
[17:8] |
Packet length limit in 16-byte words, for the 40GbE IP core. The IP core discards packets based on this length limit: frames of size within 20 bytes over the length limit may or may not be dropped, but oversized frames that are 20 or more bytes over the length limit are always dropped. The IP core records packets in the too long counter if they have length greater than the length specified in this register field. |
0x280 |
RW |
[15:8] |
Packet length limit in 40-byte words, for the 100GbE IP core. The IP core discards packets based on this length limit: frames of size within 44 bytes over the length limit may or may not be dropped, but oversized frames that are 44 or more bytes over the length limit are always dropped. The IP core records packets in the too long counter if they have length greater than the length specified in this register field. |
0xf0 |
RW |
||
[5] |
When set to 1, non-pause control frames are removed; this filtering is only enabled when RX_FILTER_CTRL bit [0] is set to 0. |
1 |
RW |
||
[4] |
When set to 1, pause frames are removed; this filtering is only enabled when RX_FILTER_CTRL bit [0] is set to 0. |
1 |
RW |
||
[3] |
When set to 1, runt frames are removed regardless of the filtering enable bit 0x103[0]. The IP core identifies frames of length eight bytes or less as decoding errors rather than as runt frames. |
1b’1 |
RW |
||
[2] |
When set to 1, the filter discard packets which do not target a matching destination address. |
1b’0 |
RW |
||
[1] |
When set to 1, the filter discards packets with FCS errors. |
1b’1 |
RW |
||
[0] |
When set to 0 enables filtering. When set to 1, accepts all traffic (promiscuous mode). However, when bit [3] is set, runts are removed regardless of the value of bit [0]. |
1b’0 |
RW |