Video and Vision Processing Suite Intel® FPGA IP User Guide

ID 683329
Date 4/04/2022
Public

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23.2. Warp IP Parameters

The IP offers various compile-time parameters.
Table 366.  Warp IP Parameters
Parameter Values Description
Video data format
Number of pixels in parallel 1 or 2 Number of pixels processed in parallel.
Number of color planes 3 Number of color planes per pixel.
Bits per color sample 10 Number of bits per color sample
Maximum input video width 2048 or 3840 Maximum number of pixels per input line. Configures the depth of line buffers in the video input block.

The IP can process image widths of up to 3840. However, it can process only horizontal resolutions that are a multiple of 4 pixels. For example, the IP can process image widths of 720 or 724 correctly but not widths of 721, 722 or 723.

Maximum output video width 2048 or 3840 Maximum number of pixels per output line. Configures the depth of line buffers in the video output block.
Configuration Settings
Use easy warp On or off

Turn on for a limited set of warp operations. Turn off for a range of arbitrary warps.

The IP can only process image heights and widths that are a multiple of two when you select 2 pixels in parallel and turn on Use easy warp.

Number of engines 1 or 2 Number of processing engines to use. Not available when you turn on Use easy warp.
Memory frame buffer size SD, HD or UHD

The amount of memory space the IP allocates to each frame buffer.

  • SD is 1024x1024 pixels
  • HD is 2048x2048 pixels
  • UHD is 4096x4096 pixels.
Enable Debug Registers On or off Turn on to read back various registers containing debugging information.
Figure 46. Warp IP GUI
Table 367.  Warp IP Throughput for different parameters
Number of pixels in parallel The number of processing engines to use fMAX (MHz) Performance
1 1 150 Image resolutions of up to 1920x1080 at 60 fps.
1 1 300 Image resolutions of up to 3840x2160 at 30 fps.
2 2 300 Image resolutions of up to 3840x2160 at 60 fps.
1 1 600 Image resolutions of up to 3840x2160 at 60 fps.