EPCQ-A Serial Configuration Device Datasheet

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ID 683818
Date 10/01/2019
Public
Document Table of Contents
Document Table of Contents x
1. EPCQ-A Serial Configuration Device Datasheet
1. EPCQ-A Serial Configuration Device Datasheet x
1.1. Supported Devices 1.2. Features 1.3. Operating Conditions 1.4. Pin Information 1.5. Device Package and Ordering Code 1.6. Memory Array Organization 1.7. Memory Operations 1.8. Status Register 1.9. Summary of Operation Codes 1.10. Power Mode 1.11. Timing Information 1.12. Programming and Configuration File Support 1.13. Appendix: SFDP Register Definitions 1.14. Document Revision History for the EPCQ-A Serial Configuration Device Datasheet
1.3. Operating Conditions x
1.3.1. Absolute Maximum Ratings 1.3.2. Recommended Operating Conditions 1.3.3. DC Operating Conditions 1.3.4. AC Measurement Conditions 1.3.5. ICC Supply Current 1.3.6. Capacitance
1.4. Pin Information x
1.4.1. Pin-Out Diagram for EPCQ4A, EPCQ16A and EPCQ32A Devices 1.4.2. Pin-Out Diagram for EPCQ64A and EPCQ128A Devices 1.4.3. EPCQ-A Device Pin Description
1.5. Device Package and Ordering Code x
1.5.1. Package 1.5.2. Ordering Code
1.6. Memory Array Organization x
1.6.1. Address Range for EPCQ4A 1.6.2. Address Range for EPCQ16A 1.6.3. Address Range for EPCQ32A 1.6.4. Address Range for EPCQ64A 1.6.5. Address Range for EPCQ128A
1.7. Memory Operations x
1.7.1. Timing Requirements
1.8. Status Register x
1.8.1. Read Status Operation 1.8.2. Write Status Operation
1.9. Summary of Operation Codes x
1.9.1. Read Bytes Operation (03h) 1.9.2. Fast Read Operation (0Bh) 1.9.3. Extended Dual Input Fast Read Operation (BBh) 1.9.4. Extended Quad Input Fast Read Operation (EBh) 1.9.5. Read Device Identification Operation (9Fh) 1.9.6. Read Silicon Identification Operation (ABh) 1.9.7. Write Enable Operation (06h) 1.9.8. Write Disable Operation (04h) 1.9.9. Write Bytes Operation (02h) 1.9.10. Quad Input Fast Write Bytes Operation (32h) 1.9.11. Erase Bulk Operation (C7h) 1.9.12. Erase Sector Operation (D8h) 1.9.13. Erase Subsector Operation (20h) 1.9.14. Read SFDP Register Operation (5Ah)
1.11. Timing Information x
1.11.1. Write Operation Timing 1.11.2. Read Operation Timing
1. EPCQ-A Serial Configuration Device Datasheet

1.11.1. Write Operation Timing

Figure 20. Write Operation Timing Diagram


Table 24.  Write Operation Parameters
Symbol Parameter Min Typical Max Unit
fWCLK Write clock frequency (from the FPGA, download cable, or embedded processor) for write enable, write disable, read status, read device identification, write bytes, erase bulk, and erase sector operations. — — 100 MHz
tCH DCLK high time for EPCQ4A. 4 — — ns
DCLK high time for EPCQ16A, EPCQ32A, EPCQ64A, and EPCQ128A. 3.4
tCL DCLK low time for EPCQ4A. 4 — — ns
DCLK low time for EPCQ16A, EPCQ32A, EPCQ64A, and EPCQ128A. 3.4
tNCSSU Chip select (nCS) active setup time for EPCQ4A. 5 — — ns
Chip select (nCS) active setup time for EPCQ16A, EPCQ32A, EPCQ64A, and EPCQ128A. 3 — — ns
tNCSH Chip select (nCS) not active hold time for EPCQ4A. 5 — — ns
Chip select (nCS) not active hold time for EPCQ16A, EPCQ32A, EPCQ64A, and EPCQ128A. 3 — — ns
tNCSSU2 Chip select (nCS) not active setup time for EPCQ4A. 5 — — ns
Chip select (nCS) not active setup time for EPCQ16A, EPCQ32A, EPCQ64A, and EPCQ128A. 3 — — ns
tNCSH2 Chip select (nCS) active hold time for EPCQ4A. 5 — — ns
Chip select (nCS) active hold time for EPCQ16A, EPCQ32A, EPCQ64A, and EPCQ128A. 3 — — ns
tDSU DATA[] in setup time before the rising edge on DCLK 2 — — ns
tDH DATA[] hold time after the rising edge on DCLK for EPCQ4A. 5 — — ns
DATA[] hold time after the rising edge on DCLK for EPCQ16A, EPCQ32A, EPCQ64A, and EPCQ128A. 3
tCSH Chip select (nCS) high time for EPCQ4A. 100 — — ns
Chip select (nCS) high time for EPCQ16A, EPCQ32A, EPCQ64A, and EPCQ128A. 10 or 5011
tWB 12 13 Write bytes cycle time for EPCQ4A. — 0.4 0.8 ms
Write bytes cycle time for EPCQ16A. 0.4 3
Write bytes cycle time for EPCQ32A and EPCQ128A. 0.7 3
Write bytes cycle time for EPCQ64A. 0.8 3
tWS 12 Write status cycle time — 10 15 ms
tEB 12 Erase bulk cycle time for EPCQ4A — 1 4 s
Erase bulk cycle time for EPCQ16A 5 25
Erase bulk cycle time for EPCQ32A 10 50
Erase bulk cycle time for EPCQ64A 20 100
Erase bulk cycle time for EPCQ128A 40 200
tES 12 Erase sector cycle time for EPCQ4A. — 150 1000 ms
Erase sector cycle time for EPCQ16A, EPCQ32A, EPCQ64A, and EPCQ128A. 2000
tESS 12 Erase subsector cycle time for EPCQ4A. — 30 300 ms
Erase subsector cycle time for EPCQ16A, EPCQ32A, EPCQ64A, and EPCQ128A. 45 400
11 10 ns for read and 50 ns for write, erase or program.
12 The Write Operation Timing Diagram does not show these parameters.
13 The tWB parameter is for a complete page write operation.
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