CPRI Intel® FPGA IP User Guide

ID 683595
Date 4/04/2022
Public

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3.5.2. AUX Interface Synchronization

Figure 31. Relationship Between Synchronization Pulses and Numbers on the AUX InterfaceThe output synchronization signals are useful for custom user logic, including frame synchronization across hops in multi-hop configurations.

The output synchronization signals are derived from the CPRI frame synchronization state machine.