External Memory Interfaces Intel® Stratix® 10 FPGA IP User Guide

ID 683741
Date 9/26/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

4.4.20. sideband14

address=57(32 bit)

Field Bit High Bit Low Description Access
mmr_refresh_cid 3 1 DDR4 3DS Chip ID Refresh. When asserted, indicates the logical rank chip ID for 3DS refresh. (This field is not applicable for DDR3.) Read