Cyclone® V Hard Processor System Technical Reference Manual

ID 683126
Date 8/28/2023
Public
Document Table of Contents

12.6.4.5. ECC

The single-port controller supports memory ECC calculated by the controller.
The controller ECC employs standard Hamming logic to detect and correct single-bit errors and detect double-bit errors. The controller ECC is available for 16-bit and 32-bit widths, each requiring an additional 8 bits of memory, resulting in an actual memory width of 24-bits and 40-bits, respectively.
Note: The level of ECC support is package dependent.
Functions the controller ECC provides are:
  • Byte Writes
  • ECC Write Backs
  • Notification of ECC Errors