Intel® Cyclone® 10 LP Device Datasheet

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ID 683251
Date 10/31/2022
Public
Document Table of Contents
Document Table of Contents x
Intel® Cyclone® 10 LP Device Datasheet
Intel® Cyclone® 10 LP Device Datasheet x
Operating Conditions Power Consumption Switching Characteristics Configuration Specifications I/O Timing Glossary Document Revision History for the Intel® Cyclone® 10 LP Device Datasheet
Operating Conditions x
Absolute Maximum Ratings Maximum Allowed Overshoot or Undershoot Voltage Recommended Operating Conditions ESD Performance DC Characteristics I/O Standard Specifications
DC Characteristics x
Supply Current Bus Hold OCT Specifications Final OCT Resistance Equation Impedance Change Example Pin Capacitance Internal Weak Pull-Up and Weak Pull-Down Resistor Hot-Socketing Schmitt Trigger Input
I/O Standard Specifications x
Single-Ended I/O Standard Specifications Single-Ended SSTL and HSTL I/O Reference Voltage Specifications Single-Ended SSTL and HSTL I/O Standards Signal Specifications Differential SSTL I/O Standard Specifications Differential HSTL I/O Standard Specifications Differential I/O Standard Specifications
Switching Characteristics x
Core Performance Specifications Periphery Performance
Core Performance Specifications x
Clock Tree Specifications PLL Specifications Embedded Multiplier Specifications Memory Block Specifications
Periphery Performance x
High-Speed I/O Specifications Duty Cycle Distortion Specifications OCT Calibration Timing Specification IOE Programmable Delay
High-Speed I/O Specifications x
RSDS Transmitter Timing Specifications Emulated RSDS_E_1R Transmitter Timing Specifications Mini-LVDS Transmitter Timing Specifications True LVDS Transmitter Timing Specifications Emulated LVDS Transmitter Timing Specifications LVDS Receiver Timing Specifications
Configuration Specifications x
JTAG Timing Parameters Active Configuration Mode Specifications AS Configuration Timing Passive Configuration Mode Specifications PS Configuration Timing FPP Configuration Timing
Intel® Cyclone® 10 LP Device Datasheet

OCT Specifications

Table 7.  Series OCT Without Calibration across Process, Temperature, and Voltage (PVT) Specifications for Intel® Cyclone® 10 LP Devices
Description VCCIO (V) Resistance Tolerance Unit
Commercial Maximum Industrial, Extended industrial, and Automotive Maximum
Series OCT without calibration 3.0 ±30 ±40 %
2.5 ±30 ±40 %
1.8 ±40 ±50 %
1.5 ±50 ±50 %
1.2 ±50 ±50 %
Table 8.  Series OCT with Calibration at Device Power-Up Specifications for Intel® Cyclone® 10 LP DevicesOCT calibration is automatically performed at device power-up for OCT-enabled I/Os.
Description VCCIO (V) Calibration Accuracy Unit
Commercial Maximum Industrial, Extended industrial, and Automotive Maximum
Series OCT with calibration at device power-up 3.0 ±10 ±10 %
2.5 ±10 ±10 %
1.8 ±10 ±10 %
1.5 ±10 ±10 %
1.2 ±10 ±10 %
Table 9.  OCT Variation with Voltage and Temperature after Calibration at Device Power-Up for Intel® Cyclone® 10 LP Devices

Use this table to determine the final OCT resistance considering the variations after calibration at device power-up.

Nominal Voltage dR/dT (%/°C) dR/dV (%/mV)
3.0 0.262 –0.026
2.5 0.234 –0.039
1.8 0.219 –0.086
1.5 0.199 –0.136
1.2 0.161 –0.288

Final OCT Resistance Equation

ΔRV = (V2 – V1) × 1000 × dR/dV 6 7 8 9

ΔRT = (T2 – T1) × dR/dT 10 11 12 13

For ΔRx < 0; MFx = 1/ (|ΔRx|/100 + 1) 14 15

For ΔRx > 0; MFx = ΔRx/100 + 1 14 15

MF = MFV × MFT 15

Rfinal = Rinitial × MF 15 16 17

Impedance Change Example

Calculate the change of 50-Ω I/O impedance from 25°C at 3.0 V to 85°C at 3.15 V as follows:

ΔRV = (3.15 – 3) × 1000 × –0.026 = –3.83

ΔRT = (85 – 25) × 0.262 = 15.72

Because ΔRV is negative,

MFV = 1 / (3.83/100 + 1) = 0.963

Because ΔRT is positive,

MFT = 15.72/100 + 1 = 1.157

MF = 0.963 × 1.157 = 1.114

Rfinal = 50 × 1.114 = 55.71 Ω

6 ΔRV is a variation of resistance with voltage.
7 V2 is final voltage.
8 V1 is the initial voltage.
9 dR/dV is the change percentage of resistance with voltage after calibration at device power-up.
10 ΔRT is a variation of resistance with temperature.
11 T2 is the final temperature.
12 T1 is the initial temperature.
13 dR/dT is the change percentage of resistance with temperature after calibration at device power-up.
14 Subscript x refers to both V and T.
15 MF is multiplication factor.
16 Rfinal is final resistance.
17 Rinitial is initial resistance.
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