Intel® Quartus® Prime Pro Edition User Guide: Platform Designer

ID 683609
Date 4/02/2022
Public

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6.6.4.4.3. Reset Deassert Flow

The following flow sequence occurs for a Reset Deassert Flow:

  • When a reset source is deasserted, or when the reset assert sequence has completed without pending resets asserted, the deassertion flow is initiated.
  • The IRQ is asserted, if the IRQ is enabled.
  • Software reads the Status Register to determine which reset was triggered.