Intel® Quartus® Prime Pro Edition User Guide: Platform Designer

ID 683609
Date 4/02/2022
Public

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5.5. Using Bridges

You can use bridges to increase system frequency, minimize generated Platform Designer logic, minimize adapter logic, and to structure system topology when you want to control where Platform Designer adds pipelining. You can also use bridges with arbiters when there is concurrency in the system.

An Avalon® bridge has an Avalon® memory mapped agent interface and an Avalon® memory mapped host interface. You can have many components connected to the bridge agent interface, or many components connected to the bridge host interface. You can also have a single component connected to a single bridge agent or host interface.

You can configure the data width of the bridge, which can affect how Platform Designer generates bus sizing logic in the interconnect. Both interfaces support Avalon® memory mapped pipelined transfers with variable latency, and can also support configurable burst lengths.

Transfers to the bridge agent interface are propagated to the host interface, which connects to components downstream from the bridge. Bridges can provide more control over interconnect pipelining than the Limit interconnect pipeline stages to option.

Note: You can use Avalon® bridges between AXI interfaces, and between Avalon® domains. Platform Designer automatically creates interconnect logic between the AXI and Avalon® interfaces, so you do not have to explicitly instantiate bridges between these domains. For more discussion about the benefits and disadvantages of shared and separate domains, refer to the Platform Designer Interconnect.