Visible to Intel only — GUID: pey1496958801406
Ixiasoft
Add Clock, Reset, and Avalon-MM components
Add Pre-Built Systems and Memory Test Microcore Components
Export Signals, Set Base Address Assignments, and Connect Memory Tester Interface Components
Resolve Interface Requirements and Value Mismatches
Replace the memory_tester_subsystem Generic Component
Synchronize IP Results
Visible to Intel only — GUID: pey1496958801406
Ixiasoft
Build the Processor Subsystem
To build the cpu_subsystem subsystem, you add IP components from the IP Catalog:
- Type clock in the search box of the IP Catalog and double-click Clock Bridge to add that component.
- Type reset in the search box of the IP Catalog and double-click Reset Bridge to add that component.
- Right-click the name of the clock bridge and click Rename. Type mem_clk to rename the clock bridge.
- Right-click the name of the reset bridge and click Rename. Type mem_reset to rename the reset bridge.
- To add a second clock bridge, type clock in the search box of the IP Catalog and double-click Clock Bridge to add that component.
- To add a second reset bridge type reset in the search box of the and double-click Reset Bridge to add that component.
- Right-click and rename the new clock bridge and reset bridge to cpu_clk and cpu_reset, respectively.
- Connect the out_clk signal of mem_clk to the clk signal of mem_reset.
- Connect the out_clk signal of cpu_clk to the clk signal of cpu_reset.
- Edit the exported interface by double-clicking the name in the Export column, from the following table:
Table 2. Export Rename Values Component Name Description Export Value mem_clk Clock Input mem_clk mem_reset Reset Input mem_reset cpu_clk Clock Input cpu_clk cpu_reset Reset Input cpu_reset Your results should match those in the following figure:
Figure 8. Clock and Reset Components