AN 812: Platform Designer System Design Tutorial

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ID 683855
Date 4/02/2018
Public
Document Table of Contents
Document Table of Contents x
Platform Designer System Design Tutorial
Platform Designer System Design Tutorial x
Hardware and Software Requirements Download and Install the Tutorial Design Files Build the Hardware Design Build Software Applications and Download the Design AN 812: Platform Designer System Design Tutorial Revision History
Build the Hardware Design x
Open the Intel® Quartus® Prime Pro Edition Project Build a Platform Designer System with a Top-Down Approach Implement the Memory Tester Subsystem
Build a Platform Designer System with a Top-Down Approach x
Add a Processor Subsystem to the Top-Level Build the Processor Subsystem Add External Memory Interface Instantiate a Memory Tester Subsystem as a Generic Component Connect and Generate IP Files Examples of Platform Designer Generic Components
Build the Processor Subsystem x
Add a Nios® II Processor Add RAM, JTAG UART, and Avalon-MM Pipeline Bridge Connect cpu_subsystem Components Platform Designer and Platform Designer (Standard) Differences
Implement the Memory Tester Subsystem x
Add Clock, Reset, and Avalon-MM components Add Pre-Built Systems and Memory Test Microcore Components Export Signals, Set Base Address Assignments, and Connect Memory Tester Interface Components Resolve Interface Requirements and Value Mismatches Replace the memory_tester_subsystem Generic Component Synchronize IP Results
Build Software Applications and Download the Design x
Hardware setup Run the Bash Script
Platform Designer System Design Tutorial

Open the Intel® Quartus® Prime Pro Edition Project

You must specify or create an Intel® Quartus® Prime Pro Edition project when you create or open a new Platform Designer system. Platform Designer inherits the device family or number from the Intel® Quartus® Prime Pro Edition software, which guarantees the or Platform Designer coherency. To open the Intel® Quartus® Prime Pro Edition project:

  1. Launch Intel® Quartus® Prime Pro Edition software.
  2. Click File > Open Project.
  3. Browse to the project directory.
  4. Select A10.qpf and click Open.

The top-level RTL, pin assignments, and timing constraints have been created for you. The file references and pin assignments are saved in A10.qsf.

Figure 2.  Intel® Quartus® Prime Pro Edition Project
Level Two Title