External Memory Interfaces Intel® Arria® 10 FPGA IP User Guide

ID 683106
Date 12/19/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

4.1.6.11. afi_clk for RLDRAM 3

AFI clock interface

Table 162.  Interface: afi_clkInterface type: Clock Output
Port Name Direction Description
afi_clk Output Clock for the Altera PHY Interface (AFI)