Video and Vision Processing Suite Intel® FPGA IP User Guide

ID 683329
Date 12/31/2023
Public

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Document Table of Contents
1. About the Video and Vision Processing Suite 2. Getting Started with the Video and Vision Processing IPs 3. Video and Vision Processing IPs Functional Description 4. Video and Vision Processing IP Interfaces 5. Video and Vision Processing IP Registers 6. Video and Vision Processing IPs Software Programming Model 7. Protocol Converter Intel® FPGA IP 8. 1D LUT Intel® FPGA IP 9. 3D LUT Intel® FPGA IP 10. AXI-Stream Broadcaster Intel® FPGA IP 11. Bits per Color Sample Adapter Intel FPGA IP 12. Black Level Correction Intel® FPGA IP 13. Black Level Statistics Intel® FPGA IP 14. Chroma Key Intel® FPGA IP 15. Chroma Resampler Intel® FPGA IP 16. Clipper Intel® FPGA IP 17. Clocked Video Input Intel® FPGA IP 18. Clocked Video to Full-Raster Converter Intel® FPGA IP 19. Clocked Video Output Intel® FPGA IP 20. Color Space Converter Intel® FPGA IP 21. Defective Pixel Correction Intel® FPGA IP 22. Deinterlacer Intel® FPGA IP 23. Demosaic Intel® FPGA IP 24. FIR Filter Intel® FPGA IP 25. Frame Cleaner Intel® FPGA IP 26. Full-Raster to Clocked Video Converter Intel® FPGA IP 27. Full-Raster to Streaming Converter Intel® FPGA IP 28. Genlock Controller Intel® FPGA IP 29. Generic Crosspoint Intel® FPGA IP 30. Genlock Signal Router Intel® FPGA IP 31. Guard Bands Intel® FPGA IP 32. Histogram Statistics Intel® FPGA IP 33. Interlacer Intel® FPGA IP 34. Mixer Intel® FPGA IP 35. Pixels in Parallel Converter Intel® FPGA IP 36. Scaler Intel® FPGA IP 37. Stream Cleaner Intel® FPGA IP 38. Switch Intel® FPGA IP 39. Tone Mapping Operator Intel® FPGA IP 40. Test Pattern Generator Intel® FPGA IP 41. Unsharp Mask Intel® FPGA IP 42. Video and Vision Monitor Intel FPGA IP 43. Video Frame Buffer Intel® FPGA IP 44. Video Frame Reader Intel FPGA IP 45. Video Frame Writer Intel FPGA IP 46. Video Streaming FIFO Intel® FPGA IP 47. Video Timing Generator Intel® FPGA IP 48. Vignette Correction Intel® FPGA IP 49. Warp Intel® FPGA IP 50. White Balance Correction Intel® FPGA IP 51. White Balance Statistics Intel® FPGA IP 52. Design Security 53. Document Revision History for Video and Vision Processing Suite User Guide

40.4. Test Pattern Generator IP Registers

Each register is either read-only (RO) or read-write (RW).
Table 692.  Test Pattern Generator IP RegistersIn the software API these register names appear with a prefix of INTEL_VVP, INTEL_VVP_CORE or INTEL_VVP_TPG as appropriate and with an optional REG suffix
Address Register Access Description
Parameterization registers
0x0000 VID_PID RO

Read this register to retrieve the pixels in parallel converter product ID.

This register always returns 0x6AF7_0236.

0x0004 VERSION RO

Read this register to retrieve the version information for the IP.

0x0008 LITE_MODE RO Read this register to determine if lite mode is on. This register returns 0 if lite mode is off and 1 if Lite mode is on.
0x000C DEBUG_ENABLED RO

Read this register to determine if debug features is on. This register returns 1 if reads to other registers designated as RW return the last value you write to the register, or an undefined value.

0x0010 NUM_PATTERNS RO Read this register to determine the number of test pattern configurations.
0x0014 Reserved RO Reserved for future use.
0x0018 BPS RO Read this register for the number of bits per color plane.
0x001C PIP RO Read this register for the number of pixels transmitted per clock cycle at the streaming output
0x0020 PATTERN_0_TYPE RO Read this register for the pattern type of test pattern configuration 0. This register returns 0 for the bars pattern, 1 for constant color and 2 for SDI pathological.
0x0024 PATTERN_0_COLOR RO Read this register for the color space and chroma sampling for test pattern configuration 0. This register returns 0 for RGB, 1 for YCbCr 4:4:4, 2 for YCbCr 4:2:2, 3 for YCbCr 4:2:0 and 4 for monochrome.
0x0028 PATTERN_1_TYPE RO Read this register for the pattern type of test pattern configuration 1. This register returns 0 for the bars pattern, 1 for constant color and 2 for SDI pathological.
0x002C PATTERN_1_COLOR RO Read this register for the color space and chroma sampling for test pattern configuration 1. This register returns 0 for RGB, 1 for YCbCr 4:4:4, 2 for YCbCr 4:2:2, 3 for YCbCr 4:2:0 and 4 for monochrome.
0x0030 PATTERN_2_TYPE RO Read this register for the pattern type of test pattern configuration 2. This register returns 0 for the bars pattern, 1 for constant color and 2 for SDI pathological.
0x0034 PATTERN_2_COLOR RO Read this register for the color space and chroma sampling for test pattern configuration 2. This register returns 0 for RGB, 1 for YCbCr 4:4:4, 2 for YCbCr 4:2:2, 3 for YCbCr 4:2:0 and 4 for monochrome.
0x0038 PATTERN_3_TYPE RO Read this register for the pattern type of test pattern configuration 3. This register returns 0 for the bars pattern, 1 for constant color and 2 for SDI pathological.
0x003C PATTERN_3_COLOR RO Read this register for the color space and chroma sampling for test pattern configuration 3. This register returns 0 for RGB, 1 for YCbCr 4:4:4, 2 for YCbCr 4:2:2, 3 for YCbCr 4:2:0 and 4 for monochrome.
0x0040 PATTERN_4_TYPE RO Read this register for the pattern type of test pattern configuration 4. This register returns 0 for the bars pattern, 1 for constant color and 2 for SDI pathological.
0x0044 PATTERN_4_COLOR RO Read this register for the color space and chroma sampling for test pattern configuration 4. This register returns 0 for RGB, 1 for YCbCr 4:4:4, 2 for YCbCr 4:2:2, 3 for YCbCr 4:2:0 and 4 for monochrome.
0x0048 PATTERN_5_TYPE RO Read this register for the pattern type of test pattern configuration 5. This register returns 0 for the bars pattern, 1 for constant color and 2 for SDI pathological.
0x004C PATTERN_5_COLOR RO Read this register for the color space and chroma sampling for test pattern configuration 5. This register returns 0 for RGB, 1 for YCbCr 4:4:4, 2 for YCbCr 4:2:2, 3 for YCbCr 4:2:0 and 4 for monochrome.
0x0050 PATTERN_6_TYPE RO Read this register for the pattern type of test pattern configuration 6. This register returns 0 for the bars pattern, 1 for constant color and 2 for SDI pathological.
0x0054 PATTERN_6_COLOR RO Read this register for the color space and chroma sampling for test pattern configuration 6. This register returns 0 for RGB, 1 for YCbCr 4:4:4, 2 for YCbCr 4:2:2, 3 for YCbCr 4:2:0 and 4 for monochrome.
0x0058 PATTERN_7_TYPE RO Read this register for the pattern type of test pattern configuration 7. This register returns 0 for the bars pattern, 1 for constant color and 2 for SDI pathological.
0x005C PATTERN_7_COLOR RO Read this register for the color space and chroma sampling for test pattern configuration 7. This register returns 0 for RGB, 1 for YCbCr 4:4:4, 2 for YCbCr 4:2:2, 3 for YCbCr 4:2:0 and 4 for monochrome.
0x0060 to 0x011F - - Unused.

Control and debug registers

For more information, refer to Control Packets.

109
0x0120 IMG_INFO_WIDTH RW Use this register to set the width of outgoing video fields. If the output chroma sampling is 4:2:2 or 4:2:0, the width should be a multiple of 2.
0x0124 IMG_INFO_HEIGHT RW Use this register to set the full frame height for outgoing video fields. If the output chroma sampling is 4:2:0, the height should be a multiple of 2. This value is the full frame height, so any interlaced output fields contain half this number of lines.
0x0128 IMG_INFO_INTERLACE RW Use this register to set the interlace output behavior for the outgoing fields. The value you write to this register corresponds to the value that is output in the interlace identifier nibble of the outgoing image info packets (full variants only). Values 0-7 produce progressive output, values 8-15 produce interlaced output. The interlaced sequence is restarted at F0 or F1 a change to the test pattern settings (address 0x0120 to 0x0128, and 0x0150). Values 8-11 in this register restart the sequence with F0, values 12-15 restart with F1
0x012C to 0x013C - - Unused
0x0140 STATUS RO

Bit 0: Status bit.

1 = test pattern generator is processing a video field, 0 otherwise.

Lite mode off:

Bit 1: Pending register updates bit.

Any writes to the settings register (0x0148 - 0x0154) cause the IP to raise the pending register updates bit, to indicate outstanding changes to the clipping settings.

The IP lowers this bit at the next field boundary after a write to the COMMIT register.

0x0144 FIELD_COUNT RO Read this register to determine the output field index. The field index is reset to 0 following a change to the test pattern settings (address 0x0120 to 0x0128, and 0x0150). The field index increments at the end of each output field.
0x0148 CONTROL RW

Bit 0:Go bit.

Write 0 to this register to stop the test pattern generator at the end of the current frame. Write 1 to this register to start/restart output generation. This register initializes to 0 at start-up and no output fields are generated until after a write of 1 to this register.

0x014C COMMIT RW Only if Lite mode is off. The IP holds any changes to the test pattern settings via the register map pending until you issue a write to this register. The value you write is unimportant.
0x0150 PATTERN_SELECT RW Write to this register to select the pattern configuration used to generate the output. The value you write is the test pattern configuration index.
0x0154 Reserved RW Reserved.
0x0158 Reserved RW Reserved.
0x015C C0 RW Write to this register to set the value used for color plane 0 (B or Cb) by the constant color test pattern. The value in this register is ignored if no test pattern configurations use the constant color pattern.
0x0160 C1 RW Write to this register to set the value used for color plane 1 (G or Y) by the constant color test pattern. The value in this register is ignored if no test pattern configurations use the constant color pattern.
0x0164 C2 RW Write to this register to set the value used for color plane 2 (R or Cr) by the constant color test pattern. The value in this register is ignored if no test pattern configurations use the constant color pattern.
0x0168 BARS_SELECT RW Write to this register to set the variant of the bars pattern to use. Write 0 for color bars, 1 for greyscale bars, 2 for black and white bars and 3 for mixed bars. The value in this register is unused if no test pattern configurations use the bars pattern.

Register Bit Descriptions

Table 693.  VID_PID
Name Bits Description
Pixels in parallel converter version ID and product ID 31:0 This register always returns 0x6AF7_0236.
  • 15:0 is the product ID and always returns 0x0236
  • 31:16 is the vendor ID and always returns 0x6AF7
Table 694.  VERSION
Name Bits Description
Lite mode parameterization bit 7:0 Register map version. This returns 0x01.
QPDS patch revision 15:8 This returns 0x00
QPDS update revision 23:16 Updated for each release. For 21.4 this returns 0x04
QPDS major revision 31:24 Updated for each release. For 21.4 this returns 0x15.
Table 695.   LITE_MODE
Name Bits Description
Lite mode parameterization bit 0 Returns 1 if lite mode is on.
Unused 31:1 Unused.
Table 696.  DEBUG_ENABLED
Name Bits Description
Debug features parameterization bit 0 Returns 1 if debug features is on.
Unused 31:1 Unused.
Table 697.   NUM_PATTERNS
Name Bits Description
Number of enabled test pattern configurations 31:0 Returns the number of enabled test pattern configurations.
Table 698.  BPS
Name Bits Description
Bits per color 31:0 Returns the number of bits per color plane.
Table 699.  PIP
Name Bits Description
Pixels in parallel 31:0 Returns the number of pixels transmitter per clock cycle.
Table 700.  PATTERN_X_TYPE
Name Bits Description
Pattern type for configuration index X 31:0 Returns 0 for bars, 1 for constant color, and 2 for SDI pathological.
Table 701.  PATTERN_X_COLOR
Name Bits Description
Color space for configuration index X 31:0 Returns 0 for RGB, 1 for YCbCr 4:4:4, and 2 YCbCr 4:2:2, 3 for YCbCr 4:2:0 and 4 for monochrome.
Table 702.  IMG_INFO_WIDTH
Name Bits Description
Width bits 15:0 Width (in pixels) of outgoing fields.
unused 31:16 Unused.
Table 703.  IMG_INFO_HEIGHT
Name Bits Description
Height bits 15:0 Height (in pixels) of full frame.
unused 31:16 Unused.
Table 704.   IMG_INFO_INTERLACE
Name Bits Description
Interlace nibble 3:0 Standard Intel FPGA Streaming Video Image Info packet interlace nibble.
unused 31:4 Unused.
Table 705.  STATUS
Name Bits Description
Status bit 0 1 = test pattern generator is processing a video field, 0 otherwise.
Pending register updates bit 1 1 = test pattern generator has pending updates, 0 otherwise.
unused 31:2 Unused.
Table 706.  FIELD_COUNT
Name Bits Description
Field index 15:0 Current field index value
unused 31:16 Unused.
Table 707.  CONTROL
Name Bits Description
Go bit 0 1 = go, 0 = stop.
unused 31:1 Unused.
Table 708.  COMMIT
Name Bits Description
unused 31:0 Unused.
Table 709.  PATTERN_SELECT
Name Bits Description
Pattern select 2:0 Pattern configuration index.
unused 31:3 Unused.
Table 710.  CX
Name Bits Description
Color value BPS-1:0 Constant color value for color plane X.
unused 31:BPS Unused.
Table 711.  BARS_SELECT
Name Bits Description
Bar mode select 1:0 0 = color bars, 1 = greyscale bars, 2 = black and white bars, 3 = mixed bars.
unused 31:2 Unused.
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When you turn on lite mode, registers are RW only if you turn on Debug features, otherwise they are WO.